1. Technical Field
The present invention relates to data processing system in general, and in particular to an optoelectric data processing system. Still more particularly, the present invention relates to an improved architecture for an optoelectric computer system.
2. Description of the Prior Art
Within most computer systems, a bus (or a group of buses) is typically the primary vehicle by which communication among electronic components takes place. Although there are different types of buses, in its most basic form, each bus is simply a series of electrical wires interconnecting various electronic components within a computer system. The electrical transmission characteristics of a bus are defined by the material properties of the bus, the physical geometry of the components, the clock speed of the signals, and the noise within the bus. Thus, both the limitations in materials and the limitations in electronic components contribute to the electrical transmission characteristics of a bus.
As computer systems become more complex, there is a continuing need to drive signals within a bus at a faster clock rate while at the same time minimizing power, noise, and electromagnetic interference. Recent personal computer systems strive to enhance their performances by increasing clock speeds of processor(s) and a so-called "front side bus" that interconnects the processor(s) with a first level of components outside the processor(s) such as secondary or tertiary cache memories. While the internal speed of the processor(s) may have increased, the bottleneck remains to be at I/O junctions in which a system bus is involved, such as a memory access. The present disclosure provides an improved architecture for a computer system in order to enhance data throughput while retaining the legacy bus structures for other components within the computer system.